Tuesday 12 Nov 2019: Abstractions for Reasoning about Data Object Movement
Dr Utz-Uwe Haus - Cray Computers
Harrison 103 13:30-15:30
Data movement is a constraining factor in almost all HPC applications and workflows. The reasons for this ubiquity include physical design constraints, environmental/power limitations, relative advancements of processors versus memory and rapid increases in dataset sizes. While decades of research and innovation in HPC have resulted in robust and powerful optimising environments, even basic data-movement optimisation remains a challenge. In many cases, fundamental abstractions suited to the expression of data are still missing, as is a well-functioning model of various memory types/features. Performance portability of Exascale systems requires that heterogeneous memories are used intelligently and abstractly in the middleware/runtime rather than requiring explicit, laborious hand-coding. To do so, capacity, bandwidth and latency considerations of multiple levels must be understood (and often modelled) at runtime. Furthermore, the semantics of data usage within applications must be evident in the programming model.
We will present the current state of the MAESTRO project: A data-movement aware middleware design guided by a set of typical HPC applications from particle physics, electronic structure calculations, and operational weather forecast.